-------------------------------------------------------------------------------- Release 9.2.04i Trace Copyright (c) 1995-2007 Xilinx, Inc. All rights reserved. E:\Programme\Xilinx92i\bin\nt\trce.exe -ise E:/Dokumente und Einstellungen/Johannes/Eigene Dateien/ISE Projects/LED-Test/LED-Test.ise -intstyle ise -e 3 -s 4 -xml ledtest ledtest.ncd -o ledtest.twr ledtest.pcf -ucf ledtest.ucf Design file: ledtest.ncd Physical constraint file: ledtest.pcf Device,package,speed: xc3s500e,fg320,-4 (PRODUCTION 1.27 2007-10-19) Report level: error report Environment Variable Effect -------------------- ------ NONE No environment variables were set -------------------------------------------------------------------------------- INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths option. All paths that are not constrained will be reported in the unconstrained paths section(s) of the report. INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on a 50 Ohm transmission line loading model. For the details of this model, and for more information on accounting for different loading conditions, please see the device datasheet. ================================================================================ Timing constraint: NET "CLOCK_IBUFG1" PERIOD = 20 ns HIGH 50%; 1316 items analyzed, 0 timing errors detected. (0 setup errors, 0 hold errors) Minimum period is 7.939ns. -------------------------------------------------------------------------------- All constraints were met. Data Sheet report: ----------------- All values displayed in nanoseconds (ns) Clock to Setup on destination clock CLOCK ---------------+---------+---------+---------+---------+ | Src:Rise| Src:Fall| Src:Rise| Src:Fall| Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall| ---------------+---------+---------+---------+---------+ CLOCK | 7.939| | | | ---------------+---------+---------+---------+---------+ Timing summary: --------------- Timing errors: 0 Score: 0 Constraints cover 1316 paths, 0 nets, and 349 connections Design statistics: Minimum period: 7.939ns (Maximum frequency: 125.960MHz) Analysis completed Sun Apr 20 23:42:03 2008 -------------------------------------------------------------------------------- Trace Settings: ------------------------- Trace Settings Peak Memory Usage: 96 MB