Release 9.2.04i - Bitgen J.40 Copyright (c) 1995-2007 Xilinx, Inc. All rights reserved. Loading device for application Rf_Device from file '3s500e.nph' in environment E:\Programme\Xilinx92i. "ledtest" is an NCD, version 3.1, device xc3s500e, package fg320, speed -4 Opened constraints file ledtest.pcf. Sun Apr 20 23:42:06 2008 E:\Programme\Xilinx92i\bin\nt\bitgen.exe -intstyle ise -w -g DebugBitstream:No -g Binary:no -g CRC:Enable -g ConfigRate:1 -g ProgPin:PullUp -g DonePin:PullUp -g TckPin:PullUp -g TdiPin:PullUp -g TdoPin:PullUp -g TmsPin:PullUp -g UnusedPin:PullDown -g UserID:0xFFFFFFFF -g DCMShutdown:Disable -g StartUpClk:CClk -g DONE_cycle:4 -g GTS_cycle:5 -g GWE_cycle:6 -g LCK_cycle:NoWait -g Security:None -g DonePipe:No -g DriveDone:No ledtest.ncd Summary of Bitgen Options: +----------------------+----------------------+ | Option Name | Current Setting | +----------------------+----------------------+ | Compress | (Not Specified)* | +----------------------+----------------------+ | Readback | (Not Specified)* | +----------------------+----------------------+ | CRC | Enable** | +----------------------+----------------------+ | DebugBitstream | No** | +----------------------+----------------------+ | ConfigRate | 1** | +----------------------+----------------------+ | StartupClk | Cclk** | +----------------------+----------------------+ | DCMShutdown | Disable** | +----------------------+----------------------+ | DonePin | Pullup** | +----------------------+----------------------+ | ProgPin | Pullup** | +----------------------+----------------------+ | TckPin | Pullup** | +----------------------+----------------------+ | TdiPin | Pullup** | +----------------------+----------------------+ | TdoPin | Pullup** | +----------------------+----------------------+ | TmsPin | Pullup** | +----------------------+----------------------+ | UnusedPin | Pulldown** | +----------------------+----------------------+ | GWE_cycle | 6** | +----------------------+----------------------+ | GTS_cycle | 5** | +----------------------+----------------------+ | LCK_cycle | NoWait** | +----------------------+----------------------+ | DONE_cycle | 4** | +----------------------+----------------------+ | Persist | No* | +----------------------+----------------------+ | DriveDone | No** | +----------------------+----------------------+ | DonePipe | No** | +----------------------+----------------------+ | Security | None** | +----------------------+----------------------+ | UserID | 0xFFFFFFFF** | +----------------------+----------------------+ | MultiBootMode | No* | +----------------------+----------------------+ | ActivateGclk | No* | +----------------------+----------------------+ | ActiveReconfig | No* | +----------------------+----------------------+ | PartialMask0 | (Not Specified)* | +----------------------+----------------------+ | PartialMask1 | (Not Specified)* | +----------------------+----------------------+ | PartialMask2 | (Not Specified)* | +----------------------+----------------------+ | PartialGclk | (Not Specified)* | +----------------------+----------------------+ | PartialLeft | (Not Specified)* | +----------------------+----------------------+ | PartialRight | (Not Specified)* | +----------------------+----------------------+ | IEEE1532 | No* | +----------------------+----------------------+ | Binary | No** | +----------------------+----------------------+ * Default setting. ** The specified setting matches the default setting. Running DRC. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. WARNING:PhysDesignRules:367 - The signal is incomplete. The signal does not drive any load pins in the design. INFO:PhysDesignRules:772 - To achieve optimal frequency synthesis performance with the CLKFX and CLKFX180 outputs of the DCM comp DCM_SP_inst/DCM_SP_inst, consult the device Interactive Data Sheet. WARNING:PhysDesignRules:549 - Unexpected DCM programming. For DCM comp DCM_SP_inst/DCM_SP_inst, when the CLKFX or CLKFX180 pins are used the CLKIN_PERIOD attribute must be specified in order to achieve optimal performance. DRC detected 0 errors and 4 warnings. Creating bit map... WARNING:Bitgen:242 - CLKIN_PERIOD is set to 0 ps which is less than the minimum of 3067 ps. The CLKIN_PERIOD is the period of the input clock to the DCM. The CLKIN_PERIOD is used by the DCM for frequency synthesis. To set the CLKIN_PERIOD in the UCF use the syntax: INST "DCM instance name" CLKIN_PERIOD=X ns; Saving bit stream in "ledtest.bit". Bitstream generation is complete.